TITLE Pentium System Architecture COURSE# CN18050C STATUS Active DURATION 2 Days DESCRIPTION This course provides an introduction to the Pentium processor and its relationship to the remainder of the system. The emphasis is on functional units and their inter-relationships, caching mechanism, and the processor's interface with the second-level cache controller and DRAM memory. OBJECTIVE After completing this course, you should be able to: - Describe the Pentium System Architecture - Describe the similarities and differences of the i386/i486 and Pentium processor and the interface with the remainder of the system. CONTENTS - The Pentium Processor Overview -- The 64-bit Data Path -- Instruction Cache -- Data Cache -- The Parallel Integer Execution Units -- The Floating-Point Unit -- New Instructions - Functional Units - An Historical Retrospective - Multiple Processors and the MESI Model - Pentium Processor Hardware Interface - Code Cache and Instruction Pipeline - Data Cache and Memory Access - Pentium Process Bus Cycles - Summary of Changes to the Software Environment - Test and Debug PREREQ. ISA or PC/PS2 System Architecture Course, N1814 or N1813, or equivalent knowledge. AUDIENCE This course is intended for programmers, engineers, and technicians. FORMAT Classroom (Traditional stand-up class) Public, Private