Resume of C. McCord http://www.tracetools.com/mccord/resume email: cm@adapti.com P.O. Box 91462, Raleigh, NC 27675 Revision "W", last modified 01/31/03 Summary: Senior Electronic Engineer specializing in high speed digital designs (166MHz+). System designs for VoIP and Wireless (802.11b) products, using both discrete logic, chipsets, and FPGA s. Successful designs using Actel & Xilinx FPGAs, along with commercial processors and chipsets, utilizing Verilog, VHDL, Viewlogic, & Orcad from both Unix and Windows based platforms. Expertise in issues such as certifications (Part 15, Part 68, etc.), EMI mitigation, pipelined synchronous designs, clock skew, ground bounce, termination and ringing control. Intimate knowledge of Intel based processor architecture, including "CPU bus" characteristics, as well as Internet Appliance processors and associated DSPs. Experienced in the use of logic analyzers and sophisticated test equipment along with development of custom tools, including data collection hardware, for instruction and address tracing of microprocessor bus activity during benchmarking. Software / admin experience with "C"/"C++" and Perl in Linux/Unix/AIX and Windows environments. Recent experience also includes consumer product development (VoIP, HTTP, FTP, TCP/IP, RS232) as a project and design lead with experience in embedded Linux, digital design (Motorola microprocessors, PLDs, FPGAs, simulation), analog design (A/D, D/A, DC/DC, AC/DC), & PCB design. Employment: Jun. 2001 to present Adapticom Inc., P.O. Box 91461 Raleigh, NC 27675-1461 919-870-0608 Principal Engineer; management of Adapticom Engineering Team. VoIP designs utilizing a wide variety of components and technologies, including the Atmel AT75C310 dual DSP processor and Motorola MC68EN302 Integrated Multiprotocol Processor accompanied by the CT8020 TrueSpeech co-processor, along with Si3044 Silicon Labs DAA (Data Access Arrangement) line interface, OKI MSM7716 "Single Rail" linear CODEC , National TP3054 CODEC, SiLabs Si3220 Dual ProSLIC, STMicroelectronics STLC3055 SLIC, Legerity Am79R70 SLIC, Intersil HC55181 SLIC, discrete SLICs, as well as Atmel Fast-VirtualNet, Atheros Communication AR5001X Combo WLAN solution, AMD Am1772™ wireless chipset, Intel OC192 Wan Uplink, and other circuitry associated with networking, VoIP and wireless communications. Currently providing Net2Phone Inc. with new product development expertise including: initial electrical design, raw PCB layout and fabrication, prototype builds, mechanical design, Bill of Materials (BOM) costing / cost reduction, and certifications (Part 15, Part 68, etc.) - mitigation work. Responsible for all hardware engineering involved in bringing to market Net2Phone's recent product, the Yap Jack Plus . Nov. 1999 to Jan. 2001 Net2Phone Inc., Hackensack, NJ Consulting Engineer; duties included: Investigation of IP telephony possibilities over cable and telephone systems, attendance at trade shows and evaluation of telephony products, and interfacing with Net2Phone business partners to develop plans for fast paced cable telephony projects and trials. Managed engineering team providing documentation and explanations of telephony standards and protocols, along with general industry references. Feb. 1995 to Jan. 2000 IBM Corp., Dept. 2S9, Server Performance Analysis, Research Triangle Park, NC. Contract Engineer; duties included: Sub-system, module, and gate level design of realtime high speed (166 MHz) digital systems utilizing Actel and Xilinx Field Programmable Gate Arrays , Verilog, Vhdl, Synopsys, ModelSim, Synplicity, and Viewlogic schematic capture. Conducted Verilog/VHDL benchmarking on Actel & Xilinx FPGAs. System level design of realtime high speed digital systems capable of collecting data at 1600 mbytes/second. Aug. 1992 to Feb. 1995 IBM Corp., Dept. 96S, System Performance Evaluation, Boca Raton, FL. Design Engineer, duties included: Design of high speed digital systems (66 MHz) for collecting trace data from X86, Pentium, and P6 based systems. Implementation of "processor like" functions in Actel FPGAs. "Beta" test site for Actel place and route software. Multi-module simulation utilizing Viewsim. AIX/Unix system administrator for a network of Risc based workstations. Creation of post processing software (utilizing "C" and "C++") for validating and analyzing trace data. Published author on the use of FPGAs to shorten development cycles in products for emerging markets. Pioneer in the use of hierarchical design techniques for printed circuit board design on Viewlogic/PCAD based CAD systems. Extensive experience with the AFS file system and networked systems using TCP/IP. IBM Coordinator: M. Lydon, 919/543-5117. Mar.1991 to Aug.1992 IBM T.J. Watson Research Ctr, Dept 523, System Performance Analysis, Hawth., NY. Design Engineer, responsible for design of custom hardware to trace and measure the performance of various Intel X86 based systems. Viewlogic, Palasm, and ORCAD development & simulation tools used for "chip level" designs utilizing Actel FPGA's along with various high speed PALs. Cadence/Valid- Allegro development tools used to implement board level designs based on "Fast" and Advanced BiCMOS logic families. IBM Coordinator: Joe Morris, 914/784-7432. May 1990 to Nov. 1990 IBM Corp., Dept. 26T, Mobile Solutions Development, Boca Raton, Fl. Design Engineer. Duties included chip level design of various PALs and FPGAs to replace existing discrete "System Board" logic achieving a reduction in size and power consumption for the IBM PC Radio (Invention Disclosure #BC8-91-0132). Design, simulation, and testing carried out using the Actel ALS FPGA development system, along with the ORCAD schematic capture system. IBM Coordinator: Stephen Still, 407/982-0078. Sept. 1989 to May 1990 IBM Corp., Dept. 96S, Custom Products, Boca Raton, Fl. Design Engineer and Systems Integrator. Duties included debug and redesign of PC based "Point of Sale" terminals, utilizing programmable logic devices and P-Cad schematic capture software. IBM Coordinator: Frank Fado, 407/443-2482. Apr. 1987 to Nov. 1988 IBM Corp., Dept. 96S, Custom Products, Boca Raton, Fl. Design Engineer and Systems Integrator. IBM Coordinator: Bill Totten, 407/443-2558. Technical Education: ISDN Technology and Applications , July, 1996. Instruction and materials from N.T.U. High-Speed Computer Networks , June, 1996. Instruction and materials from N.T.U. Intro to Java , May., 1996. Instruction and materials from N.T.U. Learn Perl Now! , May., 1996. Instruction and materials from N.T.U. Tutorial On Use of VHDL For Description of Digital Systems , Mar., 1996. Six hour course, instruction and materials from N.T.U. (Certificate of Attendance) Advanced VHDL Topics; Top Down Design Methodologies , Jan., 1996. Six hour course, instruction and materials from N.T.U. (Certificate of Attendance) Characteristics of Intel's Pentium Pro (P6) , Nov., 1995 Eight hour course, instruction and materials IBM. Pentium Processor System Architecture II , Nov., 1995 Twenty hour course, instruction and materials from Don Anderson & Tom Shanley. The Shapetek (Cooper & Chyan) Adaptive Autorouter , Model 50, Feb. 1994. Eight hour course, instructor and materials from Offsite Solutions, Orlando, Fl. AIX System Administration , Jan., 1994 Twentyfour hour course, instruction and materials from Skill Dynamics. Pentium Processor System Architecture , Dec., 1993 Instruction and materials from Don Anderson & Tom Shanley. Introduction to AIX and the Andrew File System , November 1993. Sixteen hour course, instructor and materials from Boca Raton Technical Services. Designing with Powerview , September 1993. Sixteen hour course, instruction and materials from Viewlogic Corp., Marlboro MA. Synopsys VHDL Synthesis & Simulation Workshop , March 1993. Forty hour course, instruction and materials from Synopsys Inc., Mountain View, Ca. PCAD Master Designer 6.0 Printed Circuit Board Design Course , Feb.., 1993. Forty hour course, instructor and materials from Technical Systems Integrators and PCAD.